An integrated cache and memory access time, cycle time, area, leakage, and dynamic power model

CACTI is an integrated cache and memory access time, cycle time, area, leakage, and dynamic power model. By integrating all these models together, users can have confidence that tradeoffs between time, power, and area are all based on the same assumptions and, hence, are mutually consistent. CACTI is intended for use by computer architects to better understand the performance tradeoffs inherent in memory system organizations.

CACTI is available in two forms: a web-based version and a C++ source code version. The web interface version first added for CACTI 4.0 is frequently updated with the latest versions and bug fixes, and allows CACTI to be easily accessible to a larger user community. The web interface can be accessed at https://quid.hpl.hp.com:9081/cacti/. The web interface should meet the needs of most CACTI users. For users that need to modify CACTI or integrate it into other tools to support their research, CACTI source code is still available.

Would you like to learn how to monitor a HP Switch using the Cacti solution? In this tutorial, we are going to show you how to configure SNMP on a HP Switch and configure Cacti to monitor a HP Switch. Ubuntu 19.04. Cacti 1.2.3.

Note that since CACTI is continually being upgraded, results for specific cache configurations and technologies may change as new versions are released and bugs are fixed. Please continue using a single version of the source code if consistency is important for your work. We do not plan on keeping previous web versions of CACTI available online.

As technology shrinks, the disparity between transistor and wire delay will grow. The properties of future caches/memories will primarily depend on the characteristics of the interconnection network that connects various sub-modules of a cache/memory. CACTI 6.5 is a significantly enhanced version that primarily focuses on interconnect design. In addition to a new streamlined code base with numerous bug fixes, 6.5 includes the following extensions over 5.3. 1) The ability to model different types of wires, such as RC based wires with different power, delay, and area characteristics and differential low-swing buses. 2) Ability to model Non-Uniform Cache Access (NUCA) for chip multiprocessors that takes into account the effect of network contention during the design space exploration. 3) Power model for router components. 4) Improved design space exploration that takes into account different wire types and router types (for NUCA). 5) Improved API to specify constraints involving power, delay, area, and bandwidth. 6) Improved analytical models for dominant cache components such as wordlines and bitlines. The technical report (available at https://www.hpl.hp.com/techreports/2009/HPL-2009-85.html) details the new features added to the tool along with a validation analysis of the newly added components. CACTI 6.5 can be downloaded from here (cacti 6.5).

CACTI 5.3 is a version of CACTI 5 written in C++, multithreaded with Pthreads, and with various bug fixes. CACTI 5 includes a number of major improvements over CACTI 4. First, as fabrication technologies enter the deep-submicron era, device and process parameter scaling has become non-linear. To better model this, the base technology modeling in CACTI 5 has been changed from simple linear scaling of the original CACTI 0.8 micron technology to models based on the ITRS roadmap. Second, embedded DRAM technology has become available from some vendors, and there is interest in 3D stacking of commodity DRAM with modern chip multiprocessors. As another major enhancement, CACTI 5 adds modeling support of DRAM memories. Third, to support the significant technology modeling changes above and to enable fair comparisons of SRAM and DRAM technology, the CACTI code base has been extensively rewritten to become more modular. At the same time, various circuit assumptions have been updated to be more relevant to modern design practice. Finally, numerous bug fixes and small feature additions have been made. A tech report on CACTI 5 is available at https://www.hpl.hp.com/techreports/2008/HPL-2008-20.html. CACTI 5.3 source code can be obtained by downloading the gzip'ed tar file, extracting the file (tar -xzvf cacti.5.3.rev.174.tar.gz), and running make.

CACTI 4.1 fixes a small number of bugs in CACTI 4.0. CACTI 4.0 adds a leakage power model and updates the basic circuit structures and device parameters to better reflect recent advances in semiconductor scaling. CACTI 4.0 also adds support for greater parameterization, such as user defined tag and data widths, a serial tag and data access option for low power, and modeling of memory structures without tags. A tech report on CACTI 4.0 is available at https://www.hpl.hp.com/techreports/2006/HPL-2006-86.html. For users that need to modify CACTI or integrate it into other tools to support their research, CACTI 4.1 source code can be obtained by downloading the gzip'ed tar file, gunzip'ing it (gunzip cacti4.1.tar.gz), extracting the tar'ed files (tar -xvf cacti4.1.tar) and running make.

CACTI 3.2 is a version of CACTI 3.0 with a number of small bug fixes. CACTI 3.2 can be obtained by downloading the gzip'ed tar file, gunzip'ing it (gunzip cacti3.2.tar.gz), extracting the tar'ed files (tar -xvf cacti3.2.tar) and running make. CACTI 3.0 includes modeling support for the area of caches, caches with independently addressed banks, reduced sense-amp power dissipation and other improvements to CACTI 2.0. A paper describing the CACTI 3.0 improvements to CACTI 2.0 is available in both postscript and pdf formats. CACTI 3.0 can be obtained by downloading the gzip'ed tar file, gunzip'ing it and extracting the tar'ed files.

CACTI 2.0 added modeling support for fully-associative caches, a power model, technology scaling, multiported caches, and improved tag comparison circuits, as well as other improvements to CACTI 1.0. A paper describing the CACTI 2.0 enhancements to CACTI 1.0 is available in both postscript and pdf formats. CACTI 2.0 continues to be made available for use in regression studies and verification of previous work using CACTI 2.0. CACTI 2.0 can be obtained by downloading the gzip'ed tar file, gunzip'ing it and extracting the tar'ed files.

A detailed description of the original CACTI 1.0 model is given in the CACTI technical report.

CACTI 1.0 was originally developed by Steve Wilton and Norm Jouppi. CACTI 2.0 was developed by Glenn Reinman and Norm Jouppi. CACTI 3.0 was developed by Premkishore Shivakumar and Norm Jouppi. CACTI 4 was developed by David Tarjan, Shyamkumar Thoziyoor, and Norm Jouppi. CACTI 5 was developed by Shyamkumar Thoziyoor, Naveen Muralimanohar, Jung Ho Ahn, and Norm Jouppi.

Tested on :
Ubuntu 10.10 Server x64
Cacti 0.8.7g with NET-SNMP 5.x and RRDTool 1.4.x
APC UPS BR1500I with USB connection and apcupsd (3.14.8-2) package.
The original forum topic is here.
You need to have apcupsd package installed, along with cacti.
Cacti can monitor my APC UPS using two scripts that rely on the information provided by apcaccess command.
The two scripts must be located in cacti’s scripts folder (in my case : /usr/share/cacti/site/scripts).

Changes : my UPS does not have an internal temperature sensor and cannot measure line frequency. So i modified the script to only show valid information (from apcaccess).
Stats monitored :

• Time remaining in minutes
• Battery charge level in %
• Battery voltage in Volts
• Utility line voltage in Volts
• UPS load in %

My (customized and zipped) scripts are : apcupsd.pl and check_ups.sh and they must be executable.
Graph template (with dependencies, zip archive) is : cacti_graph_template_apc_ups_statistics
Data template is : cacti_data_template_apc_ups_statistics (included in graph template).

One change from the original data template was to increase the maximum value from 220 to 250 to the data source item line_volt, because the output in my case exceeds 220 (usually 230V) and the utility voltage was not shown.

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Troubleshooting :

1. Be sure that the scripts are executable and the info in check_ups.sh is correct (the path for the check_ups.sh script)

2. Run check_ups.sh localhost 3551. It should display some statistics like :

line_volt:230.0 load_pct:7.0 b_charge:100.0 time_left:115.2 bat_volt:27.3

If it doesn’t, run the command apcaccess or apcaccess status. If you still get no output with ups stats, check to see if you have apcupsd package installed (see the beginning of the article for a link with install instructions).

3. Check RRD with command : rrdtool fetch /var/lib/cacti/rra/localhost_b_charge_117.rrd MAX where localhost_b_charge_117.rrd is the the data source file for Localhost – APC UPS Statistics. So look in Console -> Data Sources -> Localhost – APC UPS Statistics for the correct name and path.

4. Also check the Cacti log file, locate in Utilities -> System Utilites -> View Cacti Log file